Contact Info

Email: siddharthparihar@sistec.ac.in

Mr. Siddharth Singh Parihar

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Prof. Siddharth Singh Parihar is working with "Sagar Institute of Science and Technology (SISTec)" since July 2019. He received his Bachelor of Engineering Degree in Electronics and Communication Engineering from the B.I.S.T., Bhopal in the year of 2011. He completed his M.Tech. (Hons.) Degree in Digital Communication, from RGTU Bhopal in the year 2015. He has over 6 years of rich teaching & research experience and has been teaching concepts such as VLSI, VHDL, Antenna and Wave Propagation, RADAR, Digital Circuit & Systems etc. His interest involves studying and researching various techniques used for optimization of an ALU. He has published 4 research papers in various national and international journals.

Specialization

  • Subject: VLSI, Network Analysis, Digital Circuit & System
  • Research: Power Management in ALU Architectures.
  • Technology: Clock gating, CMOS, Xilinx, VHDL, FPGA

Conference/Workshop Highlights

  • Published 4 papers in International Journals.
  • Attended STTP on “OFDM 5G MIMO Communication Technologies”, organized by RGPV under TEQIP-III.
  • Attended a workshop on “Advanced Robotics & AI System”.
  • Attended a seminar on “Future and Basics of Ethical Hacking.

Career Highlights

  • Worked as a trainee at Prasar Bharti, Shahdol.
  • 6+ years of academic experience in engineering education.
  • Nominated for IRDP award 2018 in the field of R&P.
  • Guided 2 students of M.Tech. in VLSI Design.
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